Tolerances on PCB
What tolerances should I design into my PCB?
Where possible, design to PCB industry standard mid-range tolerances. If you use these tolerances you should be able to source your boards from any fabricator in the world without cost-penalty. Eurocircuits use these specifications and tolerances as the basis of our lowest-cost pooling services. Of course there may be times when component geometry or mechanical constraints mean that you need tighter tolerances. We can usually build boards to meet these requirements but they will cost a bit more as they need special handling or additional process steps (for example for blind or buried vias).
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It’s always a good idea to check your data-set and especially any drawings to make sure that they don’t specify tighter tolerances than you need. If they are outside our standard range, we may need to raise an exception, possibly delaying delivery and/or increasing costs.
NOTE
Minimum tracks, gaps and annular rings are defined in the specifications of each service and are not included in this table. There is a complete list in our PCB Design Guidelines p. 7.
Tolerances tables
| Specification | Tolerance | Notes |
| Materials | ||
| Material thickness | +/- 10% | Based on manufacturers’ specifications |
| Maximum bow and twist on boards with SMDs | 0.75% | See http://www.eurocircuits.com/eurocircuits-printed-circuits-blog/bow-and-twist-in-printed-circuits |
| Maximum bow and twist on boards without SMDs | 1.5% | |
| Drilling | ||
| Production hole oversize – plated | 0.10 mm | |
| Production hole oversize – non-plated | 0.00 mm | |
| Hole size tolerance – plated |
+/- 0.10 mm |
|
| Hole size tolerance – via holes |
+ 0.10/-0.30 mm |
By default we take all holes 0.45 mm or less to be via holes. If you have component holes with finished diameter 0.45 mm or less, use the box in the Price Calculator marked “Holes <= may be reduced” to indicate the largest hole which can be treated as a via hole. The negative tolerance allows us to reduce via hole sizes to solve annular ring issues and/or to reduce board costs by reducing the number of drilling cycles needed. More. |
| Hole size tolerance – non-plated |
+/- 0.05 mm |
|
| Aspect ratio | 1:8 | Ratio of board thickness to production drill tool |
| Hole positional tolerance | 0.10 mm | Hole to hole |
| Minimum hole to hole distance | 0.25 mm | Measured from production hole to production hole.
See PCB Design Guidelines p. 9 and technical blog |
| Minimum non-plated production hole to copper | 0.25 mm | |
| Hole wall copper | ||
| Minimum copper thickness | 20 μm | |
| Surface finish thickness | ||
| Leadfree hot-air levelling | 1 – 30 μm | |
| Electroless gold over nickel | Ni:3 -6 μm;
Au: 0.05 – 0.10 μm |
|
| Immersion silver thickness | 0.2 – 0.4 μm | |
| Plated hard gold over nickel | Ni: 3 – 6 μm; Au: 1- 1.5 μm | |
| Soldermask | ||
| Minimum soldermask to pad clearance = Mask Annular Ring (MAR) – plated holes | 0.10 mm | This depends on the copper pattern classification – see PCB Design Guidelines p.15 |
| Minimum soldermask track cover = Mask Overlap Clearance (MOC) | 0.10 mm | On tight layouts there may need to be a “trade-off” between MAR and MOC – see PCB Design Guidelines p. 16 |
| Minimum soldermask web = Mask Segment (MSM) | 0.10 mm | |
| Minimum soldermask to pad clearance = Mask Annular Ring (MAR) – non-plated holes | 0.125 mm | |
| Maximum tented finished via size | 0.25 mm | To ensure that the via hole is plugged with soldermask use ViaFill – see PCB Design Guidelines p. 16 & 20 |
| Soldermask thickness on top of conductors | >15 μm | For more information see eC-Glossary. |
| Soldermask thickness on conductor edge | >7 μm | |
| Legend | ||
| Minimum line width | 0.17 mm | |
| Minimum height for legibility | 1.00 mm | |
| Legend to soldermask cut-back (clipping) | 0.10 mm | After clipping we also remove any bits of line smaller than 0.17 mm |
| Breakrouting | ||
| Minimum clearance board edge to copper tracks/pads – outer layers | 0.25 mm | Copper planes can extend to the board edge. Select “copper to board edge” in the Price Calculator |
| Minimum clearance board edge to copper tracks/pads – inner layers | 0.40 mm | |
| Minimum slot finished width | 0.50 mm | |
| Profile dimensional tolerance | +/- 0.20 mm | |
| Positional tolerance profile/cut-out to hole | +/- 0.20 mm | |
| Slot dimensional tolerance | Width: +/- 0.10 mm
Length: +/- 0.20 mm |
|
| Minimum copper around plated and non-plated slots | As annular ring for plated and non-plated holes | |
| Scoring/V-cut | ||
| Maximum board thickness for scoring | 2.00 mm | |
| Minimum board thickness for scoring | 0.80 mm | |
| Minimum clearance board edge to copper pattern – outer and inner layers | 0.45 mm | This to allow for the V-cut. If copper pattern is nearer to the board edge, use breakrouting |
| Profile dimensional tolerance after separation | 0.30 mm | |
| Rest material | 0.45 mm +/- 0.10 mm | |
| Positional tolerance upper to lower score | +/- 0.25 mm | |
| Minimum score depth | 0.15 mm | |
| Edge bevelling | ||
| Nominal bevel angle | 30° +/- 5° | See eC-Glossary |
| Rest material | 0.25 mm | |
| ViaFill | ||
| Maximum ViaFill finished hole size | 0.25 mm | |
| Peelable Mask | ||
| See PCB Design Guidelines p. 19 | ||
| Carbon | ||
| See PCB Design Guidelines p. 18 | ||
| Heatsink Paste | ||
| See PCB Design Guidelines p. 21 | ||
| Electrical Test | ||
| Minimum test pitch | 0.10 mm | |
| Smallest testable pad | 0.05 mm | |
| Test voltage | up to 1000V | |
| Test current | 100 mA | Adjustable |
| Continuity test | Capacitance/
resistance 1 Ohm – 10 KOhm |
|
| Isolation test | Capacitance/
resistance up to 10 GOhm |
