Copper and the board edge

Copper and the board edge.

There are three options under our Advanced options heading which may be confusing:

  1. Copper up to board edge
  2. PTH on the board edge
  3. Round-edge plating.

Here’s how to sort them out.

Copper up to board edge.

To avoid damage to the copper during the profiling operation we normally ask for a minimum distance between the copper features and the edge of the PCB.  This distance is:

  • 0.25 mm on outer layers with breakrouting
  • 0.40 mm on inner layers with breakrouting
  • 0.45 mm on all layers with V-cut scoring.

These figures are needed to accommodate industry-standard manufacturing and machining tolerances.  For V-cut scoring it is also necessary to accommodate the V of the cutter.

Sometimes it is necessary to run a copper plane up to the board edge.  In this case select “Copper to board edge”.  There is no extra charge for this but it alerts our engineers to set up a different cutter speed.

“Copper to board edge” should normally only be used for planes and large copper areas where any slight damage to the copper will not impact on the performance of the PCB.

Tracks must not be placed within the minimum distance of the board edge where they could be damaged.  Our engineers will raise an exception whenever they find tracks within the exclusion zone.

If we find pads within the minimum distance of the board edge, we will clip them back to restore the minimum copper-free space unless:

  • the pads are part of an edge connector (usually with a bevelled edge)
  • the pads are marked as “up to the board edge” in a separate mechanical layer
  • the clipping is more than 25% of the pad surface in which case we will send an exception to the customer.

NOTE.

Copper to board edge cannot be combined with V-cut scoring.

TIP.

We will always cut inner layer planes back by 0.40 mm to avoid any risk of shorting.

PTH on board edge.

Also called “castellated holes”.

 

These are plated holes cut through on the board edge and used to join two PCBs either by direct soldering or via a connector.  As the process requires extra steps, plated holes on the board edge are a cost-option.

Your data should clearly show the holes and the profile.  Ideally include the information in a mechanical layer.

TIPS.

  1. There must be enough spare space on the edge of the PCB for us to hold the PCB in the production panel during manufacture.  If you need castellated holes on all 4 sides, email us your design or proposed profile as early in the design process as possible.  We can then confirm that it is manufacturable or suggest any necessary changes.
  2. You must have pads on top and bottom layer (and on inner layers where possible) to anchor the plating securely to the PCB.
  3. As a general rule the holes should be as large as possible to ensure good soldering to the mother PCB.  We recommends 0.80 mm and above.
  4. All surface finishes are possible but our preference is for selective gold over nickel for the smaller sizes.

Round edge plating.

This means that most or part of the edge of a PCB or a cut-out is plated from the top side to the bottom side.

  

This may be to ensure a good ground to a metal casing or for shielding purposes.

To manufacture a board with round-edge plating we rout the board profile where the edge plating is required before the through-hole plating process.  This involves extra process steps so round-edge plating is a cost option.

TIPS.

  1. There needs to be a band of copper on each side for the plating to connect to.
  2. As we need to hold the circuit within the production panel during processing we cannot plate round 100% of the edge.  There must be some gaps so that we can place rout tabs.  If you need a very high percentage of edge-plating, email us your design or proposed profile as early in the design process as possible.  We can then confirm that it is manufacturable or suggest any necessary changes.
  3. Indicate clearly in a mechanical layer where you need round-edge plating.
  4. Selective chemical nickel-gold is the only surface finish suitable for round-edge plating.

 

 

Slots and cut-outs

Milling, slots and cut-outs – hints and tips.

One of the most frequent questions we get asked via our support services is “how to I define slots in my PCB?”.  Slots and cut-outs also generate many exceptions, which may lead to delivery delays.  Some exceptions occur because the definition of the slots is not clear; others because slots and cut-outs are in the data but not in the order.

Terminology

“Routing” describes the cutting of the board profile, outline or contour.  We use a 2 mm cutter for this.  Any feature which can be cut with the 2 mm cutter is part of the profile.

“Milling” refers to any slots or cut-outs inside the PCB, but also to any slots in the profile of the PCB which can’t be cut with a 2 mm cutter.

How do I define my slots?

Gerber mechanical layer.

The safest and clearest way is in a Gerber mechanical layer which shows the slots/cut-outs and the profile of the PCB. Two possible ways forward:

  1. Use draws and/or flashes with the correct end size of the slot/cut-out
  2. Draw the slots/cut-outs with a 0.50 mm line.  It has the advantage that at the same time the line helps you to visually check the clearance of any copper to the board edge. Our engineers will take the centre of the line as the edge of the slot.

Combine your definition of the slots/cut-outs with the PCB contour (outline) into one Gerber file. This layer should line up with the copper layers, but to be as safe as possible make sure that the copper layers also include the PCB outline.

Different systems have different names for the mechanical layer (for instance in EAGLE it is layer Milling – layer 46).  Provided that you have included milling in your order (see below) our engineers will find the right file.

If there is no mechanical layer, you may have to adapt another layer.  If there could be any doubt which is the right file, point to it in a README file.

Avoid defining slots only in a copper layer or in a legend layer, as they are then very easy to overlook or misunderstand.  You can indicate large cut-outs in a copper or legend layer, but make sure that there is a clear outline, and put text CUTOUT in the middle.

Drill file.

Some CAD systems allow you to define slots in the drill file.  This is also safe and clear.  But they must be defined as slots with an X & Y dimension, not as a row of overlapping holes.

Plated/non-plated.

We take slots with copper on top and bottom to be plated.  Give the dimension of the finished slot size.  We will make the necessary adjustments for the plating.

Slots with no copper on top and/or bottom layer are non-plated.  If you need non-plated slots through copper pads, indicate this clearly in the mechanical layer or in a separate drill file.

Example:

This pictures shows the customer data:

customer file
  • an outline file containing some cut-outs (contour file, drawn with a 0.50mm line) – yellow
  • a drill file containing all drill holes and large round cut-outs defined as flashed hole – blue
  • a routing layer containing all slots defined as tracks with the correct slot sizes – red
PCB top view

The result shown on the final board. Note also the difference between the plated slot and the non-plated cut-out.

How do I order my slots?

In the Price calculator menu go to the section headed PCB definition and then to the Milling box.  There is a choice of 3 cutters: 2 mm, 1.2 mm and 0.50 mm.  Select the one which is the same size as, or smaller than, your smallest slot size.  Note that you cannot use a 0.5 mm cutter on board thicknesses greater than 2.00 mm.

If your board has slots or cut-outs, make sure that you fill in the Milling box.  It alerts our engineers that your board need milling.

1.2 mm and 0.5 mm cutters are cost-options.  If they have not been selected, we will need to increase the price of the PCB so our engineers will raise an exception.  There is no charge for the 2.00 mm cutter as it will cut the slots at the same time as it cuts the profile – but still complete the box so that we know that you need slots or cut-outs.

How do I check my slots?

PCB Visualizer is an automatic Gerber pre-production analyser.  Gerber is a pure vector format with, at present, no built-in attributes.  So PCB Visualizer cannot always detect structures like slots and cut-outs. What is possible at the moment:

  1. Your slots/cut-outs are defined using flashes and/or draws, placed in a separate mechanical layer and this layer lines up perfectly with all other layers => PCB Visualizer has no troubles recognizing all slots/cut-outs and displays them correctly.
  2. Your slots/cut-outs are drawn with a line (0.50mm). PCB Visualizer will display the line but the material inside the line will not be removed from the image. Our engineers will find and define them when they prepare the tooling for the PCB. Once this is done, you can view the prepared data in PCB Visualizer as the “Production data” rather than the “Customer data”.

If you want to check that the slots and cut-outs are correct before the board goes into production, set up pre-production approval by clicking the “Request pre-production approval box” under Running orders.  The job will then be halted after tool data preparation for you to check.

If you have any questions, contact our Live Chat support.

Új CadSoft EAGLE DRU fájlok az EAGLE V6-hoz

Új CadSoft EAGLE DRU fájlok az EAGLE V6-hoz

Az Új szolgáltatásunkba bekerültek az EAGLE dru fájlok PCB defináláshoz és osztályozáshoz érvényes 2013. május 25-től. : ec-eagle-design-rules-29-03-2013.zip

A következő Eurocircuits szolgáltatásokhoz biztosítjuk a DRU fájlokat:

eagle dru overview

 

2012. február 21-től

Az Eurocircuits az EAGLE hivatalos viszonteladójává vált, vagyis az EAGLE szoftver elérhető a weboldalunkon keresztül.

Újdonságok az EAGLE 6-ban

Az Új EAGLE 6 formátumban az EAGLE brd fájlok XML formátumban kerülnek mentésre. Az Új EAGLE 6 a tervezési szabály beállításokat (a használt DRU fájl) elmenti és beágyazza a board (kártya) fájlba (a .brd fájl).

A korábban az Eurocircuits által kiadott EAGLE tervezési szabály beállítások (eC-EAGLE-design-rules-24-06-2011.zip)-ben a DRU fájl idézőjel (’’) karaktereket tartalmazott, amelyeket az XML fájlformátum nem támogat. A „régi” eC-EAGLE-tervezési szabályok használata hibákhoz vezet az EAGLE 6 esetén, amikor egy 6-os verziójÚ EAGLE fájlt próbálunk betölteni a „régi” eC-EAGLE tervezési szabályokhoz. Ezért az eC-EAGLE tervezési szabályok frissítve lettek:

ec-eagle-design-rules-29-03-2013.zip

Ha ön korábban letöltötte az eC-tervezési szabályokat, de nem frissített még a 6-os verzióra, akkor nem kell telepítenie a DRU fájlokat. Ha frissített a 6-os verzióra, azt tanácsoljuk, használja az Új tervezési fájlokat.

Tervezési szabályok


Egy PCB tervezése során és természetesen a PCB tervezés végén szükségszerű, hogy az elrendezést ellenőrizzük néhány technológiai szempontból annak érdekében, hogy ön biztos lehessen abban, hogy gyártható PCB-t tervezett.

Az alap dolgok, amelyeket ellenőrizni kell a tervben a rézzel kapcsolatosak, amelyek a következők:

  • vezetőszélességek
  • szigetelőtávolságok a különböző vezetők között és alkatrészek között valamint a maradékgyűrű az átvezető furatokon és átvezető padeken.

Az alapvető dolgokon tÚl még másokat is ellenőrizhetünk például a következőkkel kapcsolatosan:

  • lakk kitakarás (pl. tÚl nagy lakk kitakarások),
  • a PCB mechanikus jellemzői (pl. a réztávolság a PCB szélétől stb.)

A fenti ellenőrzéseket tervezési szabályoknak nevezzük.

A legtöbb PCB tervező szoftverben definiálhatunk tervezési szabályokat. Néhányban nagyon egyszerűeket, másokban több a lehetőség.

A CadSoft EAGLE-ben különböző tervezési beállításokat (.DRU fájlokat) készítettünk, amelyek a minimális tervezési szabályokat foglalják magukban az Eurocircuits szolgáltatásaihoz.

Firmware – electronics design digital magazine

Subscribe to “Firmware” electronics design digital magazine through your Eurocircuits account.

“Why are Eurocircuits offering a link to a third-party technical journal? I thought you made printed circuit boards?”

As specialist prototype and small batch PCB manufacturers, we see our role as more than just making PCBs. Our goal is “added-value service”. We recognise that time-to-market is critical for our user-community. That is why in 2011 we cut our base-line delivery for small batches (anything under 50 dm2) from 10 working days to 7.

But faster fabrication is only part of the story. Were there, we asked ourselves, other areas where we could help to speed time to market? We set up a direct link with EAGLE CAD so that designers could get prices and place orders in seconds without manual data entry and without leaving their CAD PC. We developed PCB Visualizer so that they could check their data the minute it was uploaded. We launched our bench-top stencil-printer and reflow oven which can cut in-house assembly times by 80% compared to manual assembly.

These steps can make a measurable quantitative difference, but what about a qualitative difference: could we help designers design boards that would get into production quicker and were easier, faster and cheaper to make? In January 2012 we stepped up the publication of technical blogs and white papers on our website. These deliver tips and advice on Design for Manufacturability and how to present clear, unambiguous and accurate production data. Within 8 months they had received more than 60,000 hits. We backed these with DRC templates for EAGLE and Altium so that designers could be confident that their designs would meet the requirements of the most cost-effective pooling service.

A third-party digital magazine offering in-depth treatment of design-critical topics is the next step to add yet more value for our customers. We looked for a journal with genuine technical content rather than continuous sales-oriented press releases. “Firmware” was our first choice. First published in 2005 by Inware Edizioni, “Firmware” has established itself as the leading technical publication for electronics designers across Italy. It is now being launched as an international publication and have arranged that our registered users can get the first 3 English language issues free of charge.

To access your free issues, log in to your account and click on the new “Firmware” tile on the left of the screen.

 firmware subscription

If you are not a registered user, click on the “Firmware” link here to get free access to 30 pages of each issue or to link to the Inware website and take out a subscription.

Front-end data preparation – new white paper

“What do PCB fabricators do with my data before they make my PCB?” 

“Why can’t they use my data just as I sent it in?” “Why do I need to know? I’m an electronics engineer and they are the board fabricators?”. Our new white paper, “Front-end data preparation”, answers these questions.

An understanding of the front-end data preparation process is important for two reasons, speed and cost. PCBs for time-critical applications need to be delivered fast and on time. If information is missing from the data set supplied or if it is ambiguous or unclear we lose time while the issues are sorted out. The new white paper explains how we verify that the data is complete and clear, to make sure that we deliver the board that you want. Above all, it contains tips on how to present clear and unambiguous data and avoid some of the common traps which can delay deliveries.

Our pooling services have been developed to deliver prototype and small batch PCBs cost-effectively as well as fast and on time. The specifications of each service are based on a robust level of manufacturability to ensure the quality of the finished product. This is reflected in the cost structure: TECH pool is more expensive than STANDARD pool. The white paper outlines how we check that each design fits the specification of the chosen service. If it doesn’t, we report back the data issues (raise an exception). Are there simple steps which you as a designer or we as fabricators can take to avoid having to use a more expensive option? If so we will propose them. Are there repairs we can make to bring the board back within specification and improve its manufacturability? In many cases we can make these repairs as part of the data preparation process and the white paper has links to more detailed information. Design for manufacturability tips highlight some critical areas. The white paper also links to the free design rule sets which can be uploaded form our website into EAGLE and Altium CAD systems to help ensure that your design meets the specifications of the most cost-effective pooling service.

Although the white paper follows our internal procedures and includes the names of our front-end data preparation stages, our data preparation process follows industry best-practice. So throughout we relate what we do and our design tips to the wider PCB fabrication world. Our goal is to provide a broad set of technical information which will benefit not just our users but also the wider electronics engineering community across Europe.

Download the Eurocircuits-frontend data preparation white paper in PDF format.

To preserve the environment and to make use of the many embedded links to articles on our web site, we recommended that you read this white paper in its digital form.

front-end data preparation

Eurocircuits Data preparation – Make production panels

panel contour

 

By now your job has already been through two of the three front-end data preparation stages :

Stage 3 – Make production panels and production tools

We now have a stack of orders that are ready to go into production.

Our business model is based on “order pooling”.  We make our production more efficient by processing several different orders on the same production panel.  More efficient production means lower prices for our customers, especially for prototype and small batch orders. Which orders can be pooled together? This depends on a lot of factors, and finding the right balance is our daily challenge.

We need to consider:

  • Delivery term : we separate rush orders from standard delivery orders.  If we put both on the same production panel we could find that all panels have rush orders on them.  If every job becomes urgent, production efficiency goes down and our delivery performance is affected.
  • Order size : we keep large and small orders apart.  The higher the number of panels in a job, the longer it takes to process.  Production planning becomes less flexible and again we risk deliveries.
  • Copper distribution : we discussed this already in our earlier blogs about our new plating simulation tool and the Elsyca Intellitool Matrix plating project. We need to be sure that the designs we pool together don’t reduce each other’s plating quality.
  • Classification/complexity of the boards :  combining complex jobs with simpler jobs means that the final panel is more complex than it need be and so more expensive to produce.  That’s why we have two different pooling services ‘STANDARD pool” for standard boards and  “TECH pool” for more complex boards.
  • Technology: some technology options clearly can’t be combined with each other, for example different materials, copper weights and build-ups.  In other cases combinations might reduce production efficiency or quality. For example we could in theory combine boards with different legend colors on a single production panel.  In practice this would need two printing processes and two curing stages.  We would lose time at the print stage and risk the quality if the panel went through too many heating/cooling cycles.

The final decision day by day on which orders are combined on which panel is made by highly skilled and experienced engineers.  They have a growing number of software tools to help them to make the best decisions, and we are investing a lot of manpower and resources to develop even more powerful tools for the future.

Once the engineer has chosen the orders for the panel, how do we make it ready for production?

Panel preparation for production

Most of the steps below are fully automated processes

  • Run a Drill Tool Reduction: on pooling panels we remap all drill sizes larger than 1.00 mm to new tool sizes with a step of 0.10 mm rather than 0.05 mm – provided, of course, that we can still maintain the tolerance specifications of the finished hole size.  This can reduce the number of different drill sizes needed by up to 60%, which in turn reduces total drilling times and so cuts cost of your PCB.
  • Add any customer-specified markings to the boards on the panel, for example UL markings or customer-specific date-codes.
  • Add different test coupons to the panel for inline quality checking. Together these coupons contain specific features which allow us to check all process steps and make sure that the panel meets all production specifications during and after the production.
  • Add specific galvanic compensation patterns (“robber/thieving bars”) to the open panel areas. This optimizes the final plating results and ensures that after plating the copper thickness in the holes and on the tracks is within the production specifications.
  • Add etch-compensation to meet the panel and production specifications. When we etch down into the copper the nature of the process means that we also etch away a small amount of copper to each side (“under-cut”).  Etch compensation makes a small increase in all copper features so that after any under-cutting the feature size is as designed.   This is especially important to maintain correct track widths.
  • Calculate the other data we are going to need for panel checking and manufacture, like the total copper surface area or the copper distribution, information which we will need for calculating plating currents.

Panel checking and optimization

  • Perform a galvanic plating simulation to ensure a uniform layer of plated copper over the entire panel within the production specifications. At this stage our engineers may move the circuits around on the panel or change the galvanic compensation patterns to get the best possible plating result.
  • Drill optimization. For each separate drill run on the panel, the complete drill path – the order in which all the holes are drilled – is automatically optimized to get the lowest possible drill time.
  • Routing optimization. For each routing operation on the panel, the complete rout path is optimized. Here we rely on experienced production engineers to get the best possible combination of edge finish, mechanical stability of the panel during routing, and shortest routing time.

Panel plating image samples:

  • Bad copper distribution
  • panel-bad copper distribution-top panel-plating image bad-top
  • Good copper distribution
  • panel copper distrubution good -top panel – plating image good

Panel output generation

  • Drill output: we generate drill output files for each drill operation required on the panel (plated, non-plated, blind, buried). These output files will drive our various drilling machines.
  • Rout output: rout output files for all the routing and milling operations needed (board profiling, slots, internal cut-outs). The output files drive the routing machines.
  • Plotter output: plot-files for our laser film plotters for all layers produced by photo-imaging (copper layers and soldermasks).
  • Legend output: for legend (“component ident” or “silk-screen”) printing we use digital ink-jet printers. As well as the legend pattern the output files can contain an instruction that prints a unique barcode on each individual PCB.  When tests are completed this will give our customers who want it the ultimate in traceability.
  • Electrical test files for our different electrical test machines. Production panels are electrically tested before the single images are routed out. If needed a single board can also be electrically tested after final board profile routing.
  • AOI (Automated Optical Inspection) output generation. AOI testing is an automated optical comparison between the digital data supplied for the PCB and the actual copper layer we have produced. We AOI test all inner layers to detect shorts, opens and other faults which cannot be rectified once the board is bonded.  We also AOI test some outer layers depending on the technology level of the panel.
  • Other information needed for manufacture such as:
    • the surface area and density calculations for copper layers, soldermask layers, plating layers, etc
    • panel images
    • drilling, routing and scoring drawings
    • etc…

To production

The complete production panel job and all generated output data are packed together in a structured zip container and uploaded to the system.

The production panel is now ready for manufacture. Our production planners decide which production unit is going to actually make the panel (Eurocircuits Kft in Hungary or Eurocircuits Aachen in Germany).  The decision is based on the technology required, the size of the job, the delivery term and available capacity.

Eurocircuits data preparation – Single Image (part II) – other layers and outputs

Have you ever wondered what we are doing to your data when the order status is Single Image? Here is the answer based on the instructions we give to our data preparation engineers. Many of the steps described below are automated for speed and accuracy but we have ignored this to make a clearer presentation. More information on our requirements can be found on the home page under “Technology Guidelines”.

Stage 2 – Single Image data preparation (Single Image and Single Image Cross Check)

We covered before :

  • Eurocircuits data preparation – Analysis : the initial stage, checking if the data are complete and no obvious problems are there to fulfill the order.
  • Eurocircuits data preparation – Single Image (part I) – drill data and copper layers. : Verify and clean up the drill data and the outer and inner-layers.

This current article, Eurocircuits data preparation – Single Image (part II) – other layers and outputs, is our third article in a series about frontend engineering and is about the preparation of Soldermask, Silk screen (legend), coding on PCB”s, making customer panels, machine outputs: “drill layer, rout layer, V-cut layer”, SMD paste layers and optional other layers.

Solder-mask preparation

  • Replace any painted pads and areas with proper flash pads and polygons as for copper layers
  • Check for missing soldermask pads on component holes or fiducials
  • Check and add soldermask clearance pads on all non-plated holes
  • Check and correct the cover between the edge of the soldermask and the adjacent copper tracks or planes (= Mask Overlap Clearance or MOC) depending on the specification of the pattern class
  • Check and correct the clearance between the copper pad and the edge of the soldermask (=Mask Annular Ring or MAR) depending on the specification of the pattern class
  • Check and correct the minimum width of the solder-mask bridge between adjacent soldermask pads (=Mask Segment or MSM) depending on the specification of the pattern class
  • Save job
  • solder-mask before corrections solder-mask after corrections

Silk-screen (Legend) preparation

  • Check and clip clearance to the board outline
  • Check and correct minimum text width to 0.17 mm
  • Clip the silk-screen data to ensure that there is no ink on component pads
    • As standard clip back 0.10 mm from the soldermask
    • If there is no soldermask clip against the copper pads, plus drill holes, plus rout layer
    • If there is no copper clip again the drill holes, plus rout layer
  • Save job
  • legend before corrections legend after corrections

PCB coding

  • Add the Eurocircuits order number on the top or bottom silk-screen layer as specified
  • Add UL marking indication and any customer-special marking indication as ordered
  • Add Barcode coding (for traceability) as per specification
  • Save job
  • eurocircuits ordernumber

Drill drawing preparation

  • Assign standard hole-size symbols to the drill holes and provide the key
  • Check that all required dimensions and tolerances are indicated
    • For slots, indicate width, length, plated or non-plated
  • Add any additional information required:
    • Special routing or depth routing
    • Press fit holes
    • Other useful information
  • Save job
  • drillmap

Rout layer preparation

  • Copy outline to rout layer
  • Check for any customer special instructions for board profile and prepare accordingly
    • Special rout shapes and tolerances
    • Non standard tooling (radius, …)
    • Specific requirements for a customer panel
    • Separate outer (profile) routing from inner routing (cut-outs and slots) and apply proper tool sizes and numbering
  • Convert drill holes larger than 10 mm into inner routing
  • Check and set rout directions
  • Apply tool compensation
  • Add break tabs according to specifications
  • Check and set correct tool sequences for pre-drills, routing stage drills, inner/outer routings
  • Save job
  • routing- prepared

V-cut ( scoring) layer preparation

  • Create V-cut layer with 0.90 mm V-cut draws as per specifications
  • Save job

Paste layer preparation

  • If solder paste data is supplied by the customer use it without modifications
    • convert any painted pads to flash pads.
  • If no solder paste is supplied prepare the paste layer from the board data. Select all non-drilled, flashed pads that are free of soldermask and copy to a paste layer.
  • Save job

Special layers preparation

These layers will be prepared only when ordered.

  • Gold Finger Layer Preparation
    • Create the gold finger connections according the specifications
    • Add specific routing for the gold edge-connectors
    • Check the connections widths and positions and the bus bar width and position against the modified mechanical layers
  • goldfinger before preparation goldfinger after preparation
  • Peel-off Layer Preparation
    • Create the peel-off layer as specified by the customer
    • Check that it is conform to our production requirements and resolve any errors.
  • Via-Fill Layer Preparation
    • Create the via-fill layer as specified by the customer
    • Check that via-fill is only applied on 1 side of the PCB. This cannot be the side with any BGA on it
    • Check that the via-fill layer is conform to our production requirements and resolve any errors
  • Carbon Layer Preparation
    • Create the carbon layer as specified by the customer
    • Check that it is conform to our production requirements and resolve any errors

Make a customer panel

The Single Image (the “deliverable”) may be a customer-specified panel or array. There are three options here:

  • Panelisation done by Eurocircuits according to the Eurocircuits standard panel rules
    • Create a Eurocircuits standard panel using automated panelisation routines in accordance with the order details:
      • Step X and Y
      • Panel border width
      • Distance between the individual circuits
    • Check for panel stability
      • Check routing or V-cut positions
      • Check break-tab positions and add more if needed for panel stability
  • Panelisation done by Eurocircuits to the customer’s specification
    • Prepare the panel to the customer’s panel drawing
    • Check for panel stability
      • Check routing or V-cut positions
      • Check break-tab positions and add more if needed for panel stability
  • Panelisation done by the Customer
    • the customer supplies fully panelised Gerber data
      • Check for panel stability
      • Check routing or V-cut positions
      • Check break-tab positions and add more if needed for panel stability
  • Save job

 customer panel prepared

Final Check

  • Build a new netlist from the current data and check it against the reference netlist saved immediatly after the customer data was loaded.
  • If there are any differences between the two netlists, find the reason for it and correct when necessary.
  • Check each copper layer against its original data
  • Some differences are caused by our actions to make the board easier to produce, ignore them and find out where all other difference originate from and repair if needed.
  • If there are no more errors:
    • zip the job data
    • upload it to the system to allow for the next stage in the preparation process to begin

A second engineer now runs a series of checks to confirm that the production data matches:

  • the customer’s order and his other instructions
  • the specifications of the chosen Eurocircuits service

If there are any errors, these must be corrected. When the data is confirmed as correct, it is passed on to the next stage where it will be placed on a production pooling panel. We will bring this story shortly.

Eurocircuits integrates EAGLE CAD software

Eurocircuits integrates EAGLE CAD software

 

eagle logo

 

Eurocircuits have been appointed pan-European Value-Added Reseller for CadSoft’s EAGLE PCB design software.  Now you can buy EAGLE CAD software licences and upgrades directly from our website on your Eurocircuits account – no need to set up new accounts and payment procedures. How?

 

  

Why do we offer a CAD package?

We want to offer our customers more than just a top quality prototype and small batch PCB service.  We want to help them speed up their development cycle and get their products to the market faster.  The key to this is integration.  We want to provide the tools for an integrated workflow from design to assembled product. Whether you are a prototype designer or a small batch manufacturer, an integrated workflow will deliver faster product development with less risk of error and lower costs.

Downstream we have integrated our PCB and stencil products with reflow soldering.  This is already showing benefits.  Customers report that using our bench-top stencil printer they can cut assembly time by up to 75%.  In particular the eC-registration system aligns the board and stencil fully automatically, cutting out the time-consuming manual alignment needed on traditional printers.  Our bench-top reflow oven completes the process.

A CAD package allows us to integrate upstream.

Why EAGLE?

eaglev6
 Because it has proved itself over the last 20 years to be one of the most popular CAD packages around.  It is easy to learn, easy to use and affordable.  It has a powerful range of functions and proven support.  Find out more

 

  

What is EAGLE Integration?

We have been working closely with CadSoft for the last two years or so.  It is already possible to upload EAGLE BRD data files directly into our system without the need for conversion.  You can already use EAGLE design rule check templates (DRU files) to help you keep board costs down.  Each DRU file reflects the specifications of one of our pooling services so you can make sure that your board fits the most cost-effective one.

Now in EAGLE V6 a new “PCB quote” button takes integration one step further.  It directly enters the job parameters from EAGLE into our price calculators at the click of a mouse.  To get a price or place an order all you need to type in is the number of boards you need and how quickly you want them.  Board size, number of layers, material thickness, copper weights etc are all entered automatically from EAGLE.  If you have used an Eurocircuits DRU file you will also know that your design fits perfectly into your chosen pooling service.  See how it works.

Launch Discount

EAGLE campaign Eurocircuits
To launch this new service we are offering a discount key worth €30 against a Eurocircuits PCB order if you buy an EAGLE licence from us between now and 31 May 2012.

 

 

See the full * terms and conditions of the offer.

 

 

 

Eurocircuits BLOG”s

EAGLE integration is not the only extra service we are offering to PCB designers.  Look on our home page for a wealth of technical papers, guidelines and videos on PCB design and manufacture.  Feel free to comment on this BLOG post or on any of the others.  If there are other topics you’d like us to BLOG or if you’d like to share a technical post with other Eurocircuits users, please tell us at euro@eurocircuits.com

Eurocircuits data preparation – Single Image (part I) – drill data and copper image

Have you ever wondered what we are doing to your data when the order status is Single Image? Here is the answer based on the instructions we give to our data preparation engineers. Many of the steps described below are automated for speed and accuracy but we have ignored this to make a clearer presentation. More information on our requirements can be found on the home page under “Technology Guidelines”.

Stage 2 – Single Image data preparation (Single Image and Single Image Cross Check)

The name “Single Image” may be slightly confusing as it includes both single circuits and customer panels or assembly arrays. We use it to mean what we will deliver to the customer (individual circuit or panelised array) in contrast to our pooled production panels.

Build the job

  • load the job data received from Stage 1 (Analysis of PCB CAD data)
  • remove everything outside the board outline.
  • build a job netlist from the drill and Gerber data. We will use this later to check that we have not made any mistakes during the data preparation. If you have supplied an IPC netlist from your CAD system we will check the job netlist against this at this stage and raise an exception if we find discrepancies.
  • save a copy of the layers as received as a reference for later checks.
  • load the correct build-up for the job using the material thickness/copper thickness etc specified in the order
  • save the job.

Prepare the drill layer(s)

  • calculate the Nominal Hole Size. Where our standard tolerances (+/- 0.1 mm) apply, the nominal hole size is the finished hole size specified in the data (e.g. 0.80 mm). Where the designer has specified his own tolerance (e.g. +0.1/-0.00) we will aim to produce a hole in the middle of this tolerance band (so the Nominal Hole Size will be 0.85 mm).
  • increase the Nominal Hole Size to the Production Hole Size to accommodate the plating on the hole walls, the mechanical tolerances of the drilling machines etc. This is to ensure that every finished hole size is within tolerance. The rules are:
    • plated holes with finished diameter of 0.45 mm or less (taken to be via holes): increase by 0.1 mm.
    • plated holes with finished diameter of 0.50 mm or more (taken to be component holes): increase by 0.15 mm.
    • non-plated holes: increase by 0.05 mm. This is due to the bounce-back of the laminate: the drilled hole is always slightly smaller than the drill diameter.
  • Sort and regroup all drills and slots in the correct functional drill layer.
    • Put all drill and slots – PTH and NPTH – to the first drill run
    • Move any NPTH drill, slot or inner cut-out that is or can be seen as part of the board profile to the profiling run.
    • Move all NPTH drills larger then 6.00mm to the profiling run.
    • Move all NPTH drills and slots that are in a copper area (pad or plane) to the second drill run or the profiling run as per production requirements.

There are 3 possible steps in the production flow where we can drill holes:

  • First Drill Run or plated drill layer:
      • This is one of the first steps in production. All holes drilled here will become plated (PTH)
      • unless the hole is being covered with dry film, this process is commonly known as “tenting” 
  • or “tented NPTH hole”. Tented NPTH holes MUST have a copper clearance of 0.30mm and can 
  • have a maximum size of 6.00mm.
  • Second Drill Run or non-plated drill layer:
    • Is performed after the electroless plating process (or blackhole process). All holes here are non-plated (NPTH)
  • Profiling run or rout layer:
    • Is the last step where the profiling of the board is done. These holes are also non-plated (NPTH)

Outer Layer preparation

  • Clean the data
    • Replace any painted pads and areas with proper flash pads and polygons. Painted features filled with small draws were common in old-fashioned standard Gerber data but are not needed with Extended Gerber where you can define any pad shape or filled area you require.

 

   
 Non-flashed pads  painted draws

Check for missing copper pads on plated-through holes (PTH).

trace without pad
  • Check non-plated holes (NPTH)
    • Any NPTH hole which has a copper pad that is smaller than the hole, remove the copper pad
    • For the NPTH in the first drill run (Tented NPTH): Check the drill to copper clearance, it should be minimal 0.30mm.
      • Repair if needed by creating 0.30mm clearance to copper (=same repair methods/restrictions as Minimum copper to edge clearance in DRC – see article about Data Analysis)
      • If impossible to repair then move the NPTH to the second drill run or the profiling run as per production requirements.
  • Check and repair the copper free area of 0.25mm for all elements from the rout layer (=same repair methods/restrictions as Minimum copper to edge clearance in DRC)
  • Run automated design-rule checks (DRCs) to find violations against the minimum required design specifications of the chosen service. At this stage, any violation found should normally be repairable by us.
To ensure a robust end product with optimum plating, no drill breakout and, where relevant, good solderability, we look for a minimum annular ring of copper around the hole. This ring is measured from the production hole (the TOOLSIZE) which is oversized from the finished size (the ENDSIZE) to allow for the plating in the holes. For inner layers the annular ring required is larger than for outer layers to compensate for any movement in the material during bonding. For the values required see “PCB Classification” under “Technology guidelines” on our home page.
  • Check and repair minor copper defects which may cause problems in production: peelables (see PCB Design Guidelines p. 11), pinholes and copper slivers:
  • peelable Sliver

    The dimensional values of the copper defects to be detected depend upon the pattern class – Peelables and Pinholes are filled, Slivers are removed.

  • Save the job.

Inner layer preparation

  • Clean the data as for outer layers.
  • Remove all non-functional pads
  • inner layer nonfuctional pad inner layer nonfuctional pad-removed
  • Check for missing copper pads on connected plated-through holes
  • Check and repair the copper free area of 0.25mm for all elements from the rout layer (=same repair methods/restrictions as Minimum copper to edge clearance in DRC).
  • Check and repair all thermal pads as needed
  • thermal-repair before thermal-repair after
  • Check for proper thermal to plane connections, rotate the thermal if needed –  Min thermal “air-gap” should be 0.20mm.
  • Run automated design-rule checks (DRCs) to find violations against the minimum required design specifications of the chosen service. At this stage, any violation found should normally be repairable by us.
  • Save the job.
This is the end of the drill data and copper image preparation. The next article will cover Soldermask preparation, Silk screen (legend), coding on PCB”s, making customer panels, machine outputs: “drill layer, rout layer, V-cut layer”, SMD paste layers and optional other layers.

Eurocircuits data preparation – Analysis

Eurocircuits data preparation – Analysis

 

Have you ever wondered what we are doing to your data when the order status is Analysis or Single image? Here is the answer based on the instructions we give to our data preparation engineers. Many of the steps described below are automated for speed and accuracy but we have ignored this to make a clearer presentation. More information on our requirements can be found on the home page under “Technology Guidelines”.

Stage 1 – Analysis of PCB CAD data (Analysis and Analysis Cross Check)

Analyse the data files

  • Sort the data into Gerber files, Excellon drill files and any additional files (doc, txt, pdf, …) If the data comes in CAD format (EAGLE) convert into Gerber files, drill files etc.
  • Check the additional files: is there any job information there that is not in the Gerber/Excellon files or in the order (e.g. copper weights, soldermask colours, panel setup, tolerances, layer build-up etc)?

Convert the data into the format used by our data preparation software (DPF)

  • Upload and convert the Gerber and drill data. Is there critical information in aperture-lists, tool-lists or other files?
  • Check for undefined apertures or drill-tools (hole sizes) or 0-size apertures or drills

 

0-size aperture-1 0 size aperture-2
0-size aperture in the left image, should have been aperture 0.8 as in the right image.

Build the basic job

  • Give each file its proper description. These designators are used for subsequent automatic processing. The file may be:
    • a Copper layer: outer or inner
    • a Drill file: plated (PTH), -non-plated (NPTH), buried, blind
    • an Extra file: (solder)mask, silk(screen), rout, score, outline, paste, peeloff (mask), carbon,…
  • Stack the layers correctly in the job build
  • Align all layers exactly to each other.
  • Check that all layers “read” correctly. As we always view the data through the board from the top, the top layer should read correctly and bottom layers should be mirrored.
  • Reverse any “negative” plane layers where the Gerber image shows the pads etc that will be clear (not copper) in the finished board.
  • Create the outline layer. This layer represents the actual board size and shape.
  • Delete the board outlines from the other layers (but it’s a good idea to include them in the Gerber data so that we can make sure that all the layers are correctly aligned)
  • Save job
readability problem outline problem
Mixed readable and mirrored text (left) –  Top right corner cut out ? (right)

Check the data against the order and the specifications of the chosen service.

  • Check the job data against the order details:
    • number of layers, board size, single board or customer panel
    • soldermask and silk options
    • specific requirements such as edge plating, gold edge-connectors, carbon, peel-off mask, viafill etc.
    • specific requirements such as special build-ups, special materials, thickness of board and copper, specific tolerances, blind/buried vias.
  • Check the copper data against the drill files: are there any missing copper pads?
  • Check the drill data against the copper data: are there any missing drill holes?
  • Check the soldermask data against the copper pads: are there any missing soldermask pads (windows)?

Check the data against the minimum values of the chosen service

  • Check for minimum finished drill size: for example, a finished hole size less than 0.25 mm is not allowed in STANDARD pool.
  • Check for slot and cut-outs less than 0.50 mm in width – not allowed in any service.
  • Check for drill-drill distance <0.15 mm – not allowed in any service.
  • Run automated design-rule checks (DRCs) to find violations against the minimum required design specifications of the chosen service.
  • Any violation that is found will be evaluated:
    • Is it repairable by us without compromising the board functionality
    • Is the number of repairs or the complexity of the repairs needed in line with a normal data preparation process. Too much or too complex repairs are most often better solved on the customer side in the CAD system.
  • Following DRC checks are performed:
        • Minimum track width. Violations against minimum track-width will not be repaired by us
        • Not fixable minimum trace violation

    Minimum isolation distance. Violations against isolation between tracks or between track and pad will not be repaired by us

    minimum isolation violation, not repairable
      • Violations against isolation between track or pad and a copper plane can be repaired by locally withdrawing the copper plane area.
    Pad to plane isolation befor repair pad to plane isolation after repair
  • Repair is only possible if we do not create open nets in the copper plane.
  • Minimum ring of copper round drill holes on outer layers (Outer Annular Ring – OAR). OAR violations on via holes can be repaired by reducing the via drill size (the limit is the minimum via size for the pattern class) possibly in combination with enlarging the copper pad. All holes with finished diameter of 0.45 mm or less are considered being a via hole. OAR violations on component holes are repaired by enlarging the copper pad. The repairs can only be done provided they do not violate an isolation rule which cannot be repaired.
OAR error OAR repair – pad enlarged

 

  • Minimum ring of copper round drill holes on inner layers (Inner Annular Ring – IAR) The same repair rules apply as for OAR violations.
  • Minimum edge of drill to copper clearance on inners for drills without copper pad (IPI). Minimum IPI value is set to minimum IAR + 0.075mm for the given pattern class:
IPI error
  • Violations of IPI clearance on a copper plane are repaired by withdrawing the copper plane with the needed IPI clearance value. Repair is only possible if we do not create open nets in the copper plane. Violations of IPI clearance involving tracks can be repaired by moving the specific track away from the drill provided this is possible and that it does not create any insulation rule violation which is non repairable. Violations of IPI clearance involving pads are not repairable.
  • Minimum copper to edge clearance depending whether the board outline is to be routed or scored (V-cut)
    edge clearance-error edge clearance-repaired
  • Violations against the edge clearance on a copper plane are repaired by withdrawing the copper plane with the needed edge clearance value, being 0.25mm for routed board outlines and 0.45mm for scored board outlines. Repair is only possible if we do not create open nets in the copper plane. Violations on the edge clearance involving tracks can be repaired by moving the specific track inwards the board provided this is possible and that it does not create any insulation rule violation which is non repairable. Violations on the edge clearance involving pads or drill holes are not repairable.

Move to next stage or raise an exception and halt the job

• If an exception (report of documentation problems) is required make an exception document:
  • summarize all the exceptions points
    • Data missing or unclear
    • Data incorrectly formatted or corrupted in transmission, not defined apertures or 0-size apertures
    • Readability not clear, Job build not clear,outline missing or not clear
    • The provided data do not correspond with the selections made in the order
    • DRC errors that cannot be repaired by us ( see above).
  • propose solutions where possible
• If no exception is required:
  • upload the job onto the system for next stage, single image preparation.
Our data preparation process consists of 3 steps :
  • The first step is the data analysis, what this document is about. Data analysis is performed on all inquiries placed with design files and on all orders. The purpose is to detect if the documentation provided is complete and useful to quote for or accept an order.
  • The second step is the single image preparation. In this stage we are preparing the layout so that it gets fit for production . More info about this stage follows here
  • The third step is the panelizing of different jobs on a production panel  – we come back in detail to this later also.
The pictures shown in the articles about data preparation are based on real pcb orders, but have been modified to show specific problems and solutions.