In this fourth article of our series about PCB design and manufacturing issues I’ll discuss keepouts, a design tool that when used correctly can save us from making costly mistakes.
Keepouts are areas of the board where we ask our design tool to enforce some restrictions on what can and cannot be contained in that area. For example, keepouts may exclude any combination of tracks, copper pours, components, vias, or even components of a certain height. Keepouts help with both the functionality and the manufacturability of PCBs. Here are some examples of where a keepout might be useful.
- Antennae made out of copper tracks, as is common with Bluetooth, will normally require an area in all other layers to be free of copper or any other board feature within a certain distance.
- Components that occupy an area ‘above’ the board that’s larger than the soldering footprint that they occupy will require a keepout that excludes components. For example, we don’t want an 0603 sneaking in under a right-angle connector that has its pins ‘hovering’ above the board. Similarly, the actuator of a right-angle switch will need the space under it clear.
- Some heatsinks extend well beyond the component they sink heat from, so a keepout can be used to prevent components from being placed there, at all or of a particular height. This has an implication not only for assembly but also on reliability: if a component is too close to a heatsink it may suffer rapid degradation due to heat cycles.
- Many components, particularly those requiring high voltage or that can cause electromagnetic interference, need a specific amount of isolation from nearby tracks to minimise faults or crosstalk. Keepouts allow us to make sure these are enforced locally without affecting global rules.
Sometimes we need to prevent tracks from going between pads; a keepout, particularly if it can be defined at the component footprint level, can help us there.
- When we need to guarantee space for enclosure features and mechanical fasteners such as screws, a keepout can guarantee that nothing is placed in those spaces.
- If the design tool doesn’t allow it otherwise, a keepout can be used to keep a clean gap between the outline of the board as required by many manufacturers.
Using keepouts effectively
I can’t remember where I’ve seen this first, but a quote about software development seems relevant to our discussion:
“A software project has at least two developers; you and you in three months.”
Keepouts allows us to create constraints that we cannot forget later, when we’ve already forgotten the details. It’s also a very useful way to communicate constraints to other team members who are working on the design. The alternative of marking the schematic with notes is helpful, for sure, but those can easily go unnoticed, forgotten, or be misunderstood; keepouts are enforced by the software, which is usually much more robust.
I’ve read elsewhere a recommendation to add a visible element to the keepout, in silkscreen for instance. Those markings would not be keepouts, but they can provide emphasis or instruction to the assembler or the user, something like “do not glue-tack wire harness in this area”. The purposes of keepouts and legend are not the same and we should not conflate them; this will only result in both mechanisms losing their effectiveness. While we’re here, as discussed in the article about outlines, certainly never add a “keepout” marking, or any other feature, to the outline layer!
The functionality of keepouts in EDA tools keeps improving and I hope that it will continue to be enhanced to become powerful and flexible to help reduce mistakes. I’d particularly like to see more developments in applying keepout definitions on the footprint level, layer-level, and finer-grain definitions. For example, distinguishing between prohibiting SMD or through-hole components, and better control over z-axis restrictions. There’s also progress on this front with Gerber X3 that included component dimensions, and more tools natively supporting 3D modelling of the entire assembly.
How our Visualiser helps
Our Visualiser is a powerful tool that allows you to make sure everything is as it should be before ordering your PCB. But keepouts are not normally communicated to the manufacturer as they are a design-time tool, only their effect on the design is shown. We do, however, use them internally where we place keepouts under components so that we don’t place tabs under them, causing the issues I’ve previously described in the article about outlines.