Eurocircuits PCB blog

Mi foglal le jelenleg minket az Eurocircuits-nél, projektek amiken jelenleg dolgozunk, új ötletek, háttér információk és egy hely ahol ön bekapcsolódhat, elmondhatja véleményét és megoszthatja velünk mi a lényeges ön számára mint elektronikai fejlesztő.

What are conflict minerals? 



Conflict minerals are minerals originating from areas of armed conflict and human rights abuse, notably in the eastern provinces of the Democratic Republic of the Congo.

These minerals are traded through middlemen from neighbouring countries, so countries where conflict materials can originate from include also Angola, Burundi, Central African Republic, Congo Republic, Rwanda, Sudan, Tanzania, Uganda, and Zambia.




The most commonly mined minerals are cassiterite, wolframite,coltan, and gold, which are extracted from the Eastern Congo,  We are concerned about cassiterite (basis for making tin) and gold, as these metals are used in our production process.


We contacted our suppliers for these metals and got confirmation that the material we receive from them do not origin from conflict areas. Based on this information we can issue a conflict minerals declaration.

Supporting documents :

Eurocircuits conflict minerals declaration   conflict minerals declaration.pdf

Felder conflict minerals declaration (supplier of tin for HAL)   felder konflikt-metalle.pdf

Confirmation Safina ( supplier of gold)  safina.pdf

Confirmation Ampere (tin for plating line) ampere.pdf

Készítette: Lengyel Norbert
13 Jun 2013

Gold plating over edge connectors

Eurocircuits offer two types of gold finish: Electroless Nickel Immersion Gold (ENIG) as a surface finish for the whole PCB, and hard plated gold over plated nickel for edge-connector fingers. Electroless gold gives excellent solderability, but the chemical deposition process means that it is too soft and too thin to withstand repeated abrasion. Electroplated gold is thicker and harder making it ideal for edge-connector contacts for PCBs which will be repeatedly plugged in and removed.

goldplated edge connector




We plate the hard gold onto the PCBs after the soldermask process and before we apply the surface finish to the rest of the board. Hard-gold plating is compatible with all the other surface finishes we offer.

edge connector


We first plate 3 – 6 microns of nickel onto the edge connector fingers and then on top of that 1 – 2 microns of hard gold. The plated gold is not 100% pure; it contains some cobalt to increase the wear-resistance of the surface.

We normally bevel the edge connectors to ensure easy insertion. Bevelling can be specified in the order details.

edge connector profile


To make sure that the gold fingers align exactly with the edge-connector profile, we rout the vertical edges of the connector on the first drill run. The edges of the connector are then exactly aligned to the printed image.

In some cases one or more gold fingers are shorter than the rest, so that the longer pads connect first when the PCB inserted into the connector. This means that the shorter pads cannot be connected vertically to the plating bar. They have to make the connection needed for electroplating in another direction (see illustration. Here the blue lines represent the profile added at first drill stage and the green the final profiling).

edge connector schematic.png


After plating we check the adhesion of the plated nickel and gold with an industry-standard tape-test. We measure the thickness of the plated layers with a non-destructive X-ray measuring machine.

Limitations of the technology

  • The plated pads have to be on the edge of the PCB, as this is an electroplating process. There has to be an electrical connection between the plated pads and the production panel frame.
  • The maximum length of the plated pads is 40 mm as we use a standard shallow plating bath .
  • Inner layers have to be free of copper at the edge of PCB. Otherwise the bevelling could expose the copper.
  • If you want your PCBs delivered in a customer panel, the panel frame/border must be open on the edge connector side to allow us to make the connection for electroplating.
  • We can plate hard gold on two sides of PCB. But if the connectors are on the opposite sides of the PCB there has to be a minimum 150 mm between them.
    edge connector both sides.jpg
  • To ensure optimum quality surface-finish, do not place any plated holes (PTH), SMD or other pads closer than 2.00 mm (80 mil) to the gold fingers – see drawing.

    edge connector dimensions.png


Készítette: Lengyel Norbert
01 Nov 2012

To produce your board we use your design data in Gerber or EAGLE format and first perform the necessary front end actions as described in our white paper: "What do PCB fabricators do with your data before they make your PCBs?".

When this is done and your board is ready for production, we save your board’s production data in your account.  This data we call the job’s "single image" data.  “Single image” means the data we load onto our order-pooling production multi-panels, so it may refer to a single circuit image or to a delivery panel if this is what you have ordered. This is the data that is visualized in the PCB image.  You can download the full set from within your customer account.

visualisation customer account

The download of the single image production data from the Eurocircuits site has been possible since we launched our e-business platform more than 10 years ago. This open business policy has convinced customers over the years to come to us for their prototypes and small series even if they planned to have their large series produced in the Far East. We offer a fast and convenient way to calculate prices and place orders, a thorough data verification and manufacturability analysis and highly professional production processes.  Combine this with the possibility to download the verified data and use it for production wherever else you want, and you have the best possible start for the life cycle of your products.

The single image files are name coded by Eurocircuits. But this is no secret either. Let us explain what the files are and what their names stand for.

file name convention.docx

file name convention

The format of the files is mainly DPF.  This is the internal format for UCAM, the front-end data preparation or CAM (Computer Aided Manufacturing) system we use designed and developed by Ucamco.  The paste files can also be downloaded as Gerber data.  To read DPF files as well as Gerber data and Excellon drill files we recommend GC-Prevue, available as a free download from

We are sometimes asked if it possible to reload the single image data back into a CAD system.  This is totally dependent on the CAD system.  We have only input and processed manufacturing data.  Other PCB manufacturers can use it for production through their own CAM systems.  However the manufacturing data doesn’t contain any component information like foot-print coordinates or a functional net-list where nets are linked to component pin numbers and are described as power, ground, data line, etc... A successful reload of DPF or Gerber production data into a CAD system depends entirely on the functionality available in the CAD-system and should be investigated there.

Our team will gladly answer any queries you may have. Contact us on .

Készítette: Dirk stans
05 Jul 2012

Soldermask on via holes

There are 3 ways our customers prepare their layouts with respect to covering via-holes with soldermask:

  • Vias open (not covered by soldermask) on both sides of the PCB




  •  Vias closed (covered with soldermask) on both sides of the PCB


via covered


  • Vias open from one side and covered from the other side of the PCB
via half open

As necessary background information we need to briefly introduce you into the technology of applying soldermask to the boards.

First we cover the whole surface of the production panel with soldermask ink and then dry the panel (printing the soldermask)

The ink we use is a UV sensitive material. When exposed to UV-light, the ink will harden (exposing  the soldermask)

Ink that is not exposed remains soft and can be washed away using a 1% alkalic solution (developing the soldermask)

The easiest production method is to have all vias open from both sides. The vias will be clean. They will not contain any contamination nor soldermask. The next picture shows vias free of soldermask. We did not expose the soldermask on the via pads so that it remains soft and is washed away during the developing process.

via free picture

Another practical production method is where the vias are covered on both sides of the PCB. We expose the soldermask on both sides of the via-pad and via-hole so it will harden and stay on the via-pad and over the via-hole to close it. There is a risk however that (mostly in case of via-holes with a larger diameter) the via-hole is not completely covered and a small opening remains in the middle.

via partially plugged

There is a danger that chemicals get stuck in these small openings during the processes that follow after the soldermask application. These chemical can contaminate and affect for instance the chemical Ni/Au process. A further danger exists that chemicals of the Ni/Au process remain in these openings and as they are agressive chemicals they might keep on reacting in the via hole years after the board has been produced causing possible failures in usage of the PCB in its application.

discolored pad

The third case (vias covered from one side and open from the other side of the PCB) is the most problematic in production. This design creates a pocket. We expose the soldermask from one side but not from the other side. This soldermask in the middle of the via-hole will only be half polymerised. During the baking process this material can come out of the hole from the open side and contaminate the copper surface and thus disturb the surface finishing process. The pictures below shows a typical failure.

gold contaminated


Vias and Chemical Nickel-Gold (ENIG)

Vias that are not completely covered or not properly filled with soldermask may create 'skip pads' in the ENIG process.

discolored pad discolored pad

Till now we didn't receive any reasonable explanation from our material suppliers nor did we found one elsewhere that reveals the source of this problem. However supplier advise and long term experience guide us to two possible solutions to avoid the issue:

Modify the layout so that all vias are open. Our engineers favour this solution. Sadly this is not always accepted by our customers or the design may not allow it.

Apply the soldermask after the ENIG process. This is a costly solution as all copper surfaces are gold-plated and the soldermask adhesion becomes worse.

For closed via-holes we have developed an alternative solution which avoids chemicals getting trapped in the partially closed via-holes during developing of the soldermask or during application of the Ni/Au. Before the coating the entire panel with soldermask we selectively print soldermask into the via holes using a stencil. During a second print run we then cover the whole panel. This way the via-holes are completely filled with soldermask. An even layer of soldermask now covers the via-holes leaving no pockets to hold residual chemicals. We have used this technique for over 6 months, and it has proved successful in dramatically reducing the number of skip pad problems.

The following movies show this process of via filling and soldermask printing.

Setting up the machine:

Printing the soldermask into the via holes:

Result after filling the via holes:

via filled

Cover the panel with soldermask:

Result after printing the soldermask:

via covered


Drying the soldermask layer:

Készítette: Lengyel Norbert
14 Jun 2012

On April 25, ACB organized their technology seminar….Eyes on the future, feet on the ground…

ACB, known in Europe as leading manufacturer of High Technology & Quick Turnaround Printed Circuit Boards, organized its first technology seminar.

The brand new CEOGilles Rigon, opened he seminar with explaining all about the ACB philosophy.   “S” for simple and easy solutions where possible, “S” for souple and flexible processes and “S” for Solid and reliable processes and how they balance their “eyes on the future” with their “feet on the ground” approach.  In fact, the importance of this balance would return in many lectures coming.

Arnaud GrivonPCB/PCBA Technology expert from Thales showed us the possibilities and limits from stacked filled microvias and how design has a major impact on their reliability.   This technology is required to make routing possible for fine pitch BGA or array components (pitch < 0.5 mm) using microvia-in-pad and filled stacked vias.  The Cu filling is not only creating a smooth surface for assembly but can increase the reliability of the microvia too, as long as it is properly filled.  Tests have proven that the aspect ratio is max 0.8.  This means that microvias can only be filled completely in a thin insulation-layer. This sounds logic but this technology is highly sensitive and requires strict process control.

arnaud grivon - thales 

This brings us to the following presentation.  Wim Perdu, CTO at ACB, spoke about the sense and nonsense of IPC requirements in design, process and inspection.  For high density boards and fine pitch design, the feasibility of some requirements in IPC class 3 or class 3A is doubtful and not always relevant for better or more reliable quality, and the cost related with the required inspections is hallucinatory.  He expressed what many of us think but don’t dare to say because we don’t want to awake sleeping dogs.  Instead of attacking IPC standards, we try to set up workable methods to control our processes.  We set up mechanisms to avoid failures instead of detecting them in a final product.  And, indeed it is more important to know the capabilities of your supplier then to “overspecify” the products, since many aspects are hardly possible to inspect in a finished product and like Wim said: The reality is simple: if it is offered for free, it is not done.

wim perdu-acb

The next presentation came from Jan Vanfleteren who is developing for IMEC- UGent/CMST flexible and stretchable circuits.  There is an increasing demand for portable, wearable and implantable electronics and sensor systems.  To achieve the needs for comfort, place and weight saving CMST developed a technology to integrate flexible ultra thin chip packages in stretchable circuits which are completely embedded in order to make them washable and implantable.  This technology tries to make use of the existing standard PCB processes and uses temporary layers for support during processing.  These support layers are removed later on and the result is complete embedding in elastic materials.  Although this is an example of the “eyes on the future” aspect, we saw more than 1 realization of stretchable, dynamically deformable or integration in textile.  The challenge now is to have these products developed and produced on an industrial scale.

Back to the essence now:  Wim Huwel, NPI Engineer at ACB, convinced the attendees about the importance of the DFM (design for manufacturing).  It implies an early cooperation between designer and PCB manufacturer.  It combines tools and techniques to achieve better quality in a shorter development time and a more mature product at a lower cost.  Early involvement makes it possible to guide designers to use the correct industrial design rules and chose the best material for their application.  It also avoids creating the need of extra ordinary process capabilities.  Use the design rules and keep it as simple as possible.  He showed us many examples of how almost impossible build-ups were altered to the ACB “standard constructions”
= > For this reason, we, at Eurocircuits send out all these (sometimes annoying) remarks and exceptions.  We share the same opinion: use the design guide lines, check the classification table and keep it simple!

Geert Willems, driving force behind the EDM-projects, at his turn continued with an exposé about via reliability.  Too difficult to follow for most of us but he showed the need of physical models to understand the parameters that influence the reliability of vias such as via diameter, PCB thickness, the CTEz of the material and the Cu deposit with their degree of importance.  He announced that all conclusions will be included in the new DfM Guideline coming soon.
=> As EDM-partner of the early hour Eurocircuits sat down with Geert on this subject some years ago. Based upon his reliability model, we defined the basic material parameters for the base material used in our pooling services. This lead to a better quality of lead free boards and zero material defects during the last 3 years.

Wim Christiaens, NPI Engineer at ACB, returned to the subject of stacked and filled micro-vias and the importance of well filling. He guided us through the challenges of the projects they set up to achieve this properly filled micro-via. He used different BGA configurations to explain the use and the importance of the µBGA design rule table and the relation with the PCB class.  If you ever have the need for this technology, you should consider his involvement at an early stage.  His explanation of this rather difficult subject was very clear!

The row of presentations was closed with a lecture from Johan De Baets, from IMEC-CMST about Embedded components in printed circuit boards.  Traditional printed circuit boards have components on top and/or bottom.  Embedded technology started around 1990 with printed resistors and capacitors to arrive at the current stage where silicon and chip become embedded in the PCB. During the last 15 years several methods were developed to embed active components too.  Johan introduced the HERMES project: High density integration by Embedded chips for Reduced size and Electronic Systems. To be able to combine and optimize all the available existing technology from design, PCB, PBA and silicon dies many industrial players are working together in this project.  It requires a complete new business model to make this project possible.

The event was held in the Verbeke foundations residence and proved to be a perfect location for contemporary art and technology crossover.

acb event verbeke foundation
Készítette: Marianne De Wolf
04 May 2012

Large boards and pooling – new guidelines 

 425x425 top view


Over the last 12 months we have received an increasing number of boards in our pooling services at the maximum size allowed 425 x 425 mm.  These are not genuine single circuits but panels made up of many smaller circuits.  To get around our specified maximum panel size 350 x 250 mm, the individual circuits on these oversize panels are not profiled out.  In that way the users can describe the panel as a single circuit, though we know, of course, that they will subsequently cut out the individual circuits.







This practice raises two serious issues. 

First it impacts on the overall efficiency of the pooling service.

To keep prices down for all our customers we need to use as much of each pooling panel as possible. The more customers’ orders we can produce for a given area of material, the lower can we make our prices.  But a panel 425 x 425 mm means that the rest of the pooling panel is wasted.  That’s one reason why we set the maximum customer panel size at 350 x 250 mm (the other is that this is also the largest standard size panel used on many or most automatic assembly machines).  We allowed a maximum circuit dimension of 425 mm to give maximum flexibility to our customers, knowing that very few actually need individual circuits 425 x 425 mm.

Second, it is likely to produce less good PCBs.

Putting together panels with several different circuits on them requires skill and experience to optimise tooling and to achieve a good copper balance on each side and side to side.  We use sophisticated software to calculate the plating index which measures how well the copper is balanced.  When we apply this to these large  combination panels, in most cases we see a very poor copper balance with significant areas of over- and under-plating, reducing the quality of the finished circuits.

425x425 bottom plating 425x425 top plating2 425x425 bottom plating 2 425x425 top plating

To avoid these issues we have decided to set the maximum size of a single circuit on our pooling services at 8.75 dm2, the same area as our largest eC-registration-compatible panel 350 x 250 mm.  You can order larger boards up to a maximum in one dimension of 425 mm, (e.g. 425 x 100 mm) so long as the total area is not more than 8.75 dm2.The largest panel size on the pooling services remains 350 x 250 mm whether panelised by Eurocircuits or by the customer.  Further it is our policy that all customer panels prepared by us according to the Eurocircuits panel rules are eC-registration-compatible (maximum 350 x 250 mm to fit the eC-equipment).

If you need a single circuit larger than 8.75 dm2 or a panel larger than 350 x 250 mm, then upload it as an inquiry in On demand.  We will check that it is falls within the parameters of good production practice.  If it does, we will send you a quotation.  If not, we will make suggestions to improve its manufacturability.

Készítette: Dirk stans
26 Apr 2012